Freescale Semiconductor /MKV43F15 /ADC /CTRL2

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Interpret as CTRL2

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DIV00 (0)SIMULT 0CHNCFG_H 0 (0)EOSIE1 0 (0)SYNC1 0 (0)START1 0 (0)STOP1 0 (0)DMAEN1

EOSIE1=0, STOP1=0, SYNC1=0, DMAEN1=0, START1=0, SIMULT=0

Description

ADC Control Register 2

Fields

DIV0

Clock Divisor Select

SIMULT

Simultaneous mode

0 (0): Parallel scans done independently

1 (1): Parallel scans done simultaneously (default)

CHNCFG_H

CHCNF (Channel Configure High) bits

EOSIE1

End Of Scan Interrupt Enable

0 (0): Interrupt disabled

1 (1): Interrupt enabled

SYNC1

SYNC1 Enable

0 (0): B converter parallel scan is initiated by a write to CTRL2[START1] bit only

1 (1): Use a SYNC1 input pulse or CTRL2[START1] bit to initiate a B converter parallel scan

START1

START1 Conversion

0 (0): No action

1 (1): Start command is issued

STOP1

Stop

0 (0): Normal operation

1 (1): Stop mode

DMAEN1

DMA enable

0 (0): DMA is not enabled.

1 (1): DMA is enabled.

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